As long as solar cells having a semiconductor substrate with vias therein have been under development, one key issue to be addressed is the isolation of the back surface field from the via. Dopants are typically introduced into the semiconductor (i.e. silicon) substrate by means of vapor deposition of a silicate glass layer and a subsequent heat treatment for diffusion of the dopant from the silicate glass into the semiconductor substrate. Hence, they do not merely extend on one side of the substrate, but on any surface. Moreover, the via is used as a conductor to the front side conductive region, typically the emitter, which has to be isolated from the back surface field that defines the opposite electrode. A conductive channel between the via and the back surface field leads to shunting and thus malfunctioning of the solar cell.
Several process requirements make this problem less easy to solve. First of all, the charge carriers may be further diffused through the substrate after their initial definition in heat treatments. Secondly, metal from the via may diffuse through any passivation layer present in the via, with a negative impact. The passivation layer is typically a silicon nitride layer applies with Phase Enhanced Chemical Vapor Deposition (known as PECVD SiNx). Furthermore, photolithographic masking steps commonly applied in the manufacture of integrated circuits are uncommon in solar cell processing, particularly due to cost price limitations.
One solution for obtaining a suitable isolation is known from WO2011/105907. Said document discloses a plurality of process flows, each of which is characterized by the provision of a recess on the second side the substrate, around a via hole. The recess serves to isolate the previously defined back surface field from the emitter on the first side. Both the emitter and the back surface field are herein defined by means of diffusion.
The process flows of WO2011/105907 differ from each other in the order of providing the via hole, the back surface field, the emitter on the front side and the recesses. It is not at all specified in this patent application which one of the flows is considered most advantageous. A skilled person would therefore look to an order that is most common so as to minimize process steps, or to obtain a most logical order. Such most logical and hence preferred order appears to be carrying out first the diffusion steps, and thereafter carrying out the laser treatments of creating recesses and drilling via holes.
One disadvantage of this process order is that the via hole formation occurs as the last step. In practice, the via hole formation is followed by a damage removal step for removal of any damage resulting from the laser drilling of the via hole. This damage removal step typically comprises an etching treatment and is most suitably combined with the provision of texture on the first side of the substrate, so as to maximize light capturing. This alternative order is also indicated in WO2011/105907. Herein via holes are provided prior to creating the texture on the first side. Subsequently, the back surface field and the emitter are provided by diffusion and the recesses are provided in another laser etching treatment. One issue herein appears however that dopant species of both the back surface field and the emitter may end up inside the via hole leading to low shunt resistance of leakage.